Field of the Invention
This invention relates generally to the field of computer processors. More particularly, the invention relates to a method and apparatus for speculative vectorization.
Description of the Related Art
When a frequently executed loop is determined to be data parallel, an optimizing compiler will attempt to vectorize it, if the target processor architecture contains vector or single instruction multiple data (SIMD) hardware. However, it is unsafe to vectorize if the loop has memory dependencies across iterations and if these aliases cannot be resolved statically. The benefit of SIMD is lost either if these dependencies do not materialize at runtime or if these dependencies materialize very infrequently at runtime.
One way to vectorize the code is to use speculation. This approach vectorizes the code assuming the memory dependences never exist, and rolling back if dependencies do exist by checking at runtime.